diff --git a/.gitlab-ci/expectations/virt/piglit-virgl-gles-fails.txt b/.gitlab-ci/expectations/virt/piglit-virgl-gles-fails.txt
index ec6b1e4..c9f9260 100644
--- a/.gitlab-ci/expectations/virt/piglit-virgl-gles-fails.txt
+++ b/.gitlab-ci/expectations/virt/piglit-virgl-gles-fails.txt
@@ -348,12 +348,6 @@ spec@arb_shader_image_load_store@host-mem-barrier@Pixel/RaW/full barrier test/64
 spec@arb_shader_image_load_store@host-mem-barrier@Pixel/RaW/one bit barrier test/16x16,Fail
 spec@arb_shader_image_load_store@host-mem-barrier@Pixel/RaW/one bit barrier test/4x4,Fail
 spec@arb_shader_image_load_store@host-mem-barrier@Pixel/RaW/one bit barrier test/64x64,Fail
-spec@arb_shader_image_load_store@host-mem-barrier@Pixel/WaW/full barrier test/16x16,Fail
-spec@arb_shader_image_load_store@host-mem-barrier@Pixel/WaW/full barrier test/4x4,Fail
-spec@arb_shader_image_load_store@host-mem-barrier@Pixel/WaW/full barrier test/64x64,Fail
-spec@arb_shader_image_load_store@host-mem-barrier@Pixel/WaW/one bit barrier test/16x16,Fail
-spec@arb_shader_image_load_store@host-mem-barrier@Pixel/WaW/one bit barrier test/4x4,Fail
-spec@arb_shader_image_load_store@host-mem-barrier@Pixel/WaW/one bit barrier test/64x64,Fail
 spec@arb_shader_image_load_store@host-mem-barrier@Texture fetch/RaW/full barrier test/16x16,Fail
 spec@arb_shader_image_load_store@host-mem-barrier@Texture fetch/RaW/full barrier test/4x4,Fail
 spec@arb_shader_image_load_store@host-mem-barrier@Texture fetch/RaW/full barrier test/64x64,Fail
diff --git a/src/vrend_renderer.c b/src/vrend_renderer.c
index a590f3a..eba4874 100644
--- a/src/vrend_renderer.c
+++ b/src/vrend_renderer.c
@@ -8440,7 +8440,8 @@ static int vrend_renderer_transfer_internal(struct vrend_context *ctx,
    if (!info->box)
       return EINVAL;
 
-   vrend_hw_switch_context(ctx, true);
+   if (!vrend_hw_switch_context(ctx, true))
+      return EINVAL;
 
    assert(check_transfer_iovec(res, info));
    if (info->iovec && info->iovec_cnt) {