shader: Fall back to MESA_shader_integer_functions if ARB_gpu_shaders5 is missing

(u|i)mulExtended are provided by ARB_gpu_shaders5 but also by
MESA_shader_integer_functions and only the latter is supported by softpipe
so fall back to this extension if needed.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>

src/vrend_renderer.c

@@ -5649,6 +5649,7 @@ struct vrend_context *vrend_create_context(int id, uint32_t nlen, const char *de
    grctx->shader_cfg.use_explicit_locations = vrend_state.use_explicit_locations;
    grctx->shader_cfg.max_draw_buffers = vrend_state.max_draw_buffers;
    grctx->shader_cfg.has_arrays_of_arrays = has_feature(feat_arrays_of_arrays);
+   grctx->shader_cfg.has_gpu_shader5 = has_feature(feat_gpu_shader5);
 
    vrend_renderer_create_sub_ctx(grctx, 0);
    vrend_renderer_set_sub_ctx(grctx, 0);

src/vrend_shader.c

@@ -69,6 +69,7 @@
 #define SHADER_REQ_ENHANCED_LAYOUTS   (1 << 24)
 #define SHADER_REQ_SEPERATE_SHADER_OBJECTS (1 << 25)
 #define SHADER_REQ_ARRAYS_OF_ARRAYS  (1 << 26)
+#define SHADER_REQ_SHADER_INTEGER_FUNC (1 << 27)
 
 struct vrend_shader_io {
    unsigned                name;
@@ -262,6 +263,7 @@ static const struct vrend_shader_table shader_req_table[] = {
     { SHADER_REQ_TXQS, "ARB_shader_texture_image_samples" },
     { SHADER_REQ_FBFETCH, "EXT_shader_framebuffer_fetch" },
     { SHADER_REQ_SHADER_CLOCK, "ARB_shader_clock" },
+    { SHADER_REQ_SHADER_INTEGER_FUNC, "MESA_shader_integer_functions" },
 };
 
 enum vrend_type_qualifier {
@@ -4628,15 +4630,23 @@ iter_instruction(struct tgsi_iterate_context *iter,
    case TGSI_OPCODE_UMUL_HI:
       emit_buff(ctx, "umulExtended(%s, %s, umul_temp, mul_utemp);\n", srcs[0], srcs[1]);
       emit_buff(ctx, "%s = %s(%s(umul_temp%s));\n", dsts[0], get_string(dinfo.dstconv), get_string(dinfo.dtypeprefix), writemask);
-      if (!ctx->cfg->use_gles)
-         ctx->shader_req_bits |= SHADER_REQ_GPU_SHADER5;
+      if (!ctx->cfg->use_gles) {
+         if (ctx->cfg->has_gpu_shader5)
+            ctx->shader_req_bits |= SHADER_REQ_GPU_SHADER5;
+         else
+            ctx->shader_req_bits |= SHADER_REQ_SHADER_INTEGER_FUNC;
+      }
       ctx->write_mul_utemp = true;
       break;
    case TGSI_OPCODE_IMUL_HI:
       emit_buff(ctx, "imulExtended(%s, %s, imul_temp, mul_itemp);\n", srcs[0], srcs[1]);
       emit_buff(ctx, "%s = %s(%s(imul_temp%s));\n", dsts[0], get_string(dinfo.dstconv), get_string(dinfo.dtypeprefix), writemask);
-      if (!ctx->cfg->use_gles)
-         ctx->shader_req_bits |= SHADER_REQ_GPU_SHADER5;
+      if (!ctx->cfg->use_gles) {
+         if (ctx->cfg->has_gpu_shader5)
+            ctx->shader_req_bits |= SHADER_REQ_GPU_SHADER5;
+         else
+            ctx->shader_req_bits |= SHADER_REQ_SHADER_INTEGER_FUNC;
+      }
       ctx->write_mul_itemp = true;
       break;
 

src/vrend_shader.h

@@ -126,6 +126,7 @@ struct vrend_shader_cfg {
    bool use_core_profile;
    bool use_explicit_locations;
    bool has_arrays_of_arrays;
+   bool has_gpu_shader5;
 };
 
 struct vrend_context;