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367 lines
13 KiB
367 lines
13 KiB
/*
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* Copyright 2014, 2015 Red Hat.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef VIRGL_HW_H
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#define VIRGL_HW_H
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struct virgl_box {
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uint32_t x, y, z;
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uint32_t w, h, d;
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};
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/* formats known by the HW device - based on gallium subset */
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enum virgl_formats {
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VIRGL_FORMAT_B8G8R8A8_UNORM = 1,
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VIRGL_FORMAT_B8G8R8X8_UNORM = 2,
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VIRGL_FORMAT_A8R8G8B8_UNORM = 3,
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VIRGL_FORMAT_X8R8G8B8_UNORM = 4,
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VIRGL_FORMAT_B5G5R5A1_UNORM = 5,
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VIRGL_FORMAT_B4G4R4A4_UNORM = 6,
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VIRGL_FORMAT_B5G6R5_UNORM = 7,
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VIRGL_FORMAT_R10G10B10A2_UNORM = 8,
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VIRGL_FORMAT_L8_UNORM = 9, /**< ubyte luminance */
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VIRGL_FORMAT_A8_UNORM = 10, /**< ubyte alpha */
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VIRGL_FORMAT_L8A8_UNORM = 12, /**< ubyte alpha, luminance */
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VIRGL_FORMAT_L16_UNORM = 13, /**< ushort luminance */
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VIRGL_FORMAT_Z16_UNORM = 16,
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VIRGL_FORMAT_Z32_UNORM = 17,
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VIRGL_FORMAT_Z32_FLOAT = 18,
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VIRGL_FORMAT_Z24_UNORM_S8_UINT = 19,
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VIRGL_FORMAT_S8_UINT_Z24_UNORM = 20,
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VIRGL_FORMAT_Z24X8_UNORM = 21,
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VIRGL_FORMAT_S8_UINT = 23, /**< ubyte stencil */
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VIRGL_FORMAT_R32_FLOAT = 28,
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VIRGL_FORMAT_R32G32_FLOAT = 29,
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VIRGL_FORMAT_R32G32B32_FLOAT = 30,
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VIRGL_FORMAT_R32G32B32A32_FLOAT = 31,
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VIRGL_FORMAT_R16_UNORM = 48,
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VIRGL_FORMAT_R16G16_UNORM = 49,
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VIRGL_FORMAT_R16G16B16A16_UNORM = 51,
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VIRGL_FORMAT_R16_SNORM = 56,
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VIRGL_FORMAT_R16G16_SNORM = 57,
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VIRGL_FORMAT_R16G16B16A16_SNORM = 59,
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VIRGL_FORMAT_R8_UNORM = 64,
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VIRGL_FORMAT_R8G8_UNORM = 65,
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VIRGL_FORMAT_R8G8B8A8_UNORM = 67,
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VIRGL_FORMAT_R8_SNORM = 74,
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VIRGL_FORMAT_R8G8_SNORM = 75,
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VIRGL_FORMAT_R8G8B8_SNORM = 76,
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VIRGL_FORMAT_R8G8B8A8_SNORM = 77,
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VIRGL_FORMAT_R16_FLOAT = 91,
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VIRGL_FORMAT_R16G16_FLOAT = 92,
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VIRGL_FORMAT_R16G16B16_FLOAT = 93,
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VIRGL_FORMAT_R16G16B16A16_FLOAT = 94,
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VIRGL_FORMAT_L8_SRGB = 95,
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VIRGL_FORMAT_L8A8_SRGB = 96,
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VIRGL_FORMAT_B8G8R8A8_SRGB = 100,
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VIRGL_FORMAT_B8G8R8X8_SRGB = 101,
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VIRGL_FORMAT_R8G8B8A8_SRGB = 104,
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/* compressed formats */
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VIRGL_FORMAT_DXT1_RGB = 105,
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VIRGL_FORMAT_DXT1_RGBA = 106,
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VIRGL_FORMAT_DXT3_RGBA = 107,
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VIRGL_FORMAT_DXT5_RGBA = 108,
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/* sRGB, compressed */
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VIRGL_FORMAT_DXT1_SRGB = 109,
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VIRGL_FORMAT_DXT1_SRGBA = 110,
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VIRGL_FORMAT_DXT3_SRGBA = 111,
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VIRGL_FORMAT_DXT5_SRGBA = 112,
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/* rgtc compressed */
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VIRGL_FORMAT_RGTC1_UNORM = 113,
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VIRGL_FORMAT_RGTC1_SNORM = 114,
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VIRGL_FORMAT_RGTC2_UNORM = 115,
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VIRGL_FORMAT_RGTC2_SNORM = 116,
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VIRGL_FORMAT_A8B8G8R8_UNORM = 121,
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VIRGL_FORMAT_B5G5R5X1_UNORM = 122,
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VIRGL_FORMAT_R11G11B10_FLOAT = 124,
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VIRGL_FORMAT_R9G9B9E5_FLOAT = 125,
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VIRGL_FORMAT_Z32_FLOAT_S8X24_UINT = 126,
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VIRGL_FORMAT_B10G10R10A2_UNORM = 131,
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VIRGL_FORMAT_R8G8B8X8_UNORM = 134,
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VIRGL_FORMAT_B4G4R4X4_UNORM = 135,
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VIRGL_FORMAT_X24S8_UINT = 136,
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VIRGL_FORMAT_S8X24_UINT = 137,
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VIRGL_FORMAT_B2G3R3_UNORM = 139,
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VIRGL_FORMAT_L16A16_UNORM = 140,
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VIRGL_FORMAT_A16_UNORM = 141,
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VIRGL_FORMAT_A8_SNORM = 147,
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VIRGL_FORMAT_L8_SNORM = 148,
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VIRGL_FORMAT_L8A8_SNORM = 149,
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VIRGL_FORMAT_A16_SNORM = 151,
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VIRGL_FORMAT_L16_SNORM = 152,
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VIRGL_FORMAT_L16A16_SNORM = 153,
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VIRGL_FORMAT_A16_FLOAT = 155,
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VIRGL_FORMAT_L16_FLOAT = 156,
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VIRGL_FORMAT_L16A16_FLOAT = 157,
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VIRGL_FORMAT_A32_FLOAT = 159,
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VIRGL_FORMAT_L32_FLOAT = 160,
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VIRGL_FORMAT_L32A32_FLOAT = 161,
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VIRGL_FORMAT_R8_UINT = 177,
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VIRGL_FORMAT_R8G8_UINT = 178,
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VIRGL_FORMAT_R8G8B8_UINT = 179,
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VIRGL_FORMAT_R8G8B8A8_UINT = 180,
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VIRGL_FORMAT_R8_SINT = 181,
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VIRGL_FORMAT_R8G8_SINT = 182,
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VIRGL_FORMAT_R8G8B8_SINT = 183,
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VIRGL_FORMAT_R8G8B8A8_SINT = 184,
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VIRGL_FORMAT_R16_UINT = 185,
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VIRGL_FORMAT_R16G16_UINT = 186,
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VIRGL_FORMAT_R16G16B16_UINT = 187,
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VIRGL_FORMAT_R16G16B16A16_UINT = 188,
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VIRGL_FORMAT_R16_SINT = 189,
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VIRGL_FORMAT_R16G16_SINT = 190,
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VIRGL_FORMAT_R16G16B16_SINT = 191,
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VIRGL_FORMAT_R16G16B16A16_SINT = 192,
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VIRGL_FORMAT_R32_UINT = 193,
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VIRGL_FORMAT_R32G32_UINT = 194,
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VIRGL_FORMAT_R32G32B32_UINT = 195,
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VIRGL_FORMAT_R32G32B32A32_UINT = 196,
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VIRGL_FORMAT_R32_SINT = 197,
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VIRGL_FORMAT_R32G32_SINT = 198,
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VIRGL_FORMAT_R32G32B32_SINT = 199,
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VIRGL_FORMAT_R32G32B32A32_SINT = 200,
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VIRGL_FORMAT_A8_UINT = 201,
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VIRGL_FORMAT_L8_UINT = 203,
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VIRGL_FORMAT_L8A8_UINT = 204,
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VIRGL_FORMAT_A8_SINT = 205,
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VIRGL_FORMAT_L8_SINT = 207,
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VIRGL_FORMAT_L8A8_SINT = 208,
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VIRGL_FORMAT_A16_UINT = 209,
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VIRGL_FORMAT_L16_UINT = 211,
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VIRGL_FORMAT_L16A16_UINT = 212,
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VIRGL_FORMAT_A16_SINT = 213,
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VIRGL_FORMAT_L16_SINT = 215,
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VIRGL_FORMAT_L16A16_SINT = 216,
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VIRGL_FORMAT_A32_UINT = 217,
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VIRGL_FORMAT_L32_UINT = 219,
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VIRGL_FORMAT_L32A32_UINT = 220,
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VIRGL_FORMAT_A32_SINT = 221,
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VIRGL_FORMAT_L32_SINT = 223,
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VIRGL_FORMAT_L32A32_SINT = 224,
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VIRGL_FORMAT_B10G10R10A2_UINT = 225,
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VIRGL_FORMAT_R8G8B8X8_SNORM = 229,
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VIRGL_FORMAT_R8G8B8X8_SRGB = 230,
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VIRGL_FORMAT_R8G8B8X8_UINT = 231,
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VIRGL_FORMAT_R8G8B8X8_SINT = 232,
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VIRGL_FORMAT_B10G10R10X2_UNORM = 233,
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VIRGL_FORMAT_R16G16B16X16_UNORM = 234,
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VIRGL_FORMAT_R16G16B16X16_SNORM = 235,
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VIRGL_FORMAT_R16G16B16X16_FLOAT = 236,
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VIRGL_FORMAT_R16G16B16X16_UINT = 237,
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VIRGL_FORMAT_R16G16B16X16_SINT = 238,
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VIRGL_FORMAT_R10G10B10A2_UINT = 253,
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VIRGL_FORMAT_BPTC_RGBA_UNORM = 255,
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VIRGL_FORMAT_BPTC_SRGBA = 256,
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VIRGL_FORMAT_BPTC_RGB_FLOAT = 257,
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VIRGL_FORMAT_BPTC_RGB_UFLOAT = 258,
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VIRGL_FORMAT_R10G10B10X2_UNORM = 308,
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VIRGL_FORMAT_A4B4G4R4_UNORM = 311,
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VIRGL_FORMAT_MAX,
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};
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/* These are used by the capability_bits field in virgl_caps_v2. */
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#define VIRGL_CAP_NONE 0
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#define VIRGL_CAP_TGSI_INVARIANT (1 << 0)
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#define VIRGL_CAP_TEXTURE_VIEW (1 << 1)
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#define VIRGL_CAP_SET_MIN_SAMPLES (1 << 2)
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#define VIRGL_CAP_COPY_IMAGE (1 << 3)
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#define VIRGL_CAP_TGSI_PRECISE (1 << 4)
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#define VIRGL_CAP_TXQS (1 << 5)
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#define VIRGL_CAP_MEMORY_BARRIER (1 << 6)
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/* virgl bind flags - these are compatible with mesa 10.5 gallium.
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* but are fixed, no other should be passed to virgl either.
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*/
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#define VIRGL_BIND_DEPTH_STENCIL (1 << 0)
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#define VIRGL_BIND_RENDER_TARGET (1 << 1)
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#define VIRGL_BIND_SAMPLER_VIEW (1 << 3)
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#define VIRGL_BIND_VERTEX_BUFFER (1 << 4)
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#define VIRGL_BIND_INDEX_BUFFER (1 << 5)
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#define VIRGL_BIND_CONSTANT_BUFFER (1 << 6)
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#define VIRGL_BIND_DISPLAY_TARGET (1 << 7)
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#define VIRGL_BIND_STREAM_OUTPUT (1 << 11)
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#define VIRGL_BIND_SHADER_BUFFER (1 << 14)
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#define VIRGL_BIND_CURSOR (1 << 16)
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#define VIRGL_BIND_CUSTOM (1 << 17)
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#define VIRGL_BIND_SCANOUT (1 << 18)
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struct virgl_caps_bool_set1 {
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unsigned indep_blend_enable:1;
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unsigned indep_blend_func:1;
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unsigned cube_map_array:1;
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unsigned shader_stencil_export:1;
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unsigned conditional_render:1;
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unsigned start_instance:1;
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unsigned primitive_restart:1;
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unsigned blend_eq_sep:1;
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unsigned instanceid:1;
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unsigned vertex_element_instance_divisor:1;
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unsigned seamless_cube_map:1;
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unsigned occlusion_query:1;
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unsigned timer_query:1;
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unsigned streamout_pause_resume:1;
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unsigned texture_multisample:1;
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unsigned fragment_coord_conventions:1;
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unsigned depth_clip_disable:1;
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unsigned seamless_cube_map_per_texture:1;
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unsigned ubo:1;
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unsigned color_clamping:1; /* not in GL 3.1 core profile */
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unsigned poly_stipple:1; /* not in GL 3.1 core profile */
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unsigned mirror_clamp:1;
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unsigned texture_query_lod:1;
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unsigned has_fp64:1;
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unsigned has_tessellation_shaders:1;
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unsigned has_indirect_draw:1;
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unsigned has_sample_shading:1;
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unsigned has_cull:1;
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unsigned conditional_render_inverted:1;
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unsigned derivative_control:1;
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unsigned polygon_offset_clamp:1;
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unsigned transform_feedback_overflow_query:1;
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/* DO NOT ADD ANYMORE MEMBERS - need to add another 32-bit to v2 caps */
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};
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/* endless expansion capabilites - current gallium has 252 formats */
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struct virgl_supported_format_mask {
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uint32_t bitmask[16];
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};
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/* capabilities set 2 - version 1 - 32-bit and float values */
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struct virgl_caps_v1 {
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uint32_t max_version;
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struct virgl_supported_format_mask sampler;
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struct virgl_supported_format_mask render;
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struct virgl_supported_format_mask depthstencil;
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struct virgl_supported_format_mask vertexbuffer;
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struct virgl_caps_bool_set1 bset;
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uint32_t glsl_level;
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uint32_t max_texture_array_layers;
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uint32_t max_streamout_buffers;
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uint32_t max_dual_source_render_targets;
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uint32_t max_render_targets;
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uint32_t max_samples;
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uint32_t prim_mask;
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uint32_t max_tbo_size;
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uint32_t max_uniform_blocks;
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uint32_t max_viewports;
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uint32_t max_texture_gather_components;
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};
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/*
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* This struct should be growable when used in capset 2,
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* so we shouldn't have to add a v3 ever.
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*/
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struct virgl_caps_v2 {
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struct virgl_caps_v1 v1;
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float min_aliased_point_size;
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float max_aliased_point_size;
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float min_smooth_point_size;
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float max_smooth_point_size;
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float min_aliased_line_width;
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float max_aliased_line_width;
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float min_smooth_line_width;
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float max_smooth_line_width;
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float max_texture_lod_bias;
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uint32_t max_geom_output_vertices;
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uint32_t max_geom_total_output_components;
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uint32_t max_vertex_outputs;
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uint32_t max_vertex_attribs;
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uint32_t max_shader_patch_varyings;
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int32_t min_texel_offset;
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int32_t max_texel_offset;
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int32_t min_texture_gather_offset;
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int32_t max_texture_gather_offset;
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uint32_t texture_buffer_offset_alignment;
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uint32_t uniform_buffer_offset_alignment;
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uint32_t shader_buffer_offset_alignment;
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uint32_t capability_bits;
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uint32_t sample_locations[8];
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uint32_t max_vertex_attrib_stride;
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uint32_t max_shader_buffer_frag_compute;
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uint32_t max_shader_buffer_other_stages;
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uint32_t max_shader_image_frag_compute;
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uint32_t max_shader_image_other_stages;
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uint32_t max_image_samples;
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};
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union virgl_caps {
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uint32_t max_version;
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struct virgl_caps_v1 v1;
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struct virgl_caps_v2 v2;
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};
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enum virgl_errors {
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VIRGL_ERROR_NONE,
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VIRGL_ERROR_UNKNOWN,
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VIRGL_ERROR_UNKNOWN_RESOURCE_FORMAT,
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};
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enum virgl_ctx_errors {
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VIRGL_ERROR_CTX_NONE,
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VIRGL_ERROR_CTX_UNKNOWN,
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VIRGL_ERROR_CTX_ILLEGAL_SHADER,
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VIRGL_ERROR_CTX_ILLEGAL_HANDLE,
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VIRGL_ERROR_CTX_ILLEGAL_RESOURCE,
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VIRGL_ERROR_CTX_ILLEGAL_SURFACE,
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VIRGL_ERROR_CTX_ILLEGAL_VERTEX_FORMAT,
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VIRGL_ERROR_CTX_ILLEGAL_CMD_BUFFER,
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};
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#define VIRGL_RESOURCE_Y_0_TOP (1 << 0)
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#endif
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