Basic tests for fence create/poll/export. Note that export tests require VRENDTEST_USE_EGL_GLES to be set. Signed-off-by: Chia-I Wu <olvaffe@gmail.com> Reviewed-by: Gert Wollny <gert.wollny@collabora.com>macos/master
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/**************************************************************************
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* |
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* Copyright 2020 Google LLC |
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* |
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* Permission is hereby granted, free of charge, to any person obtaining a |
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* copy of this software and associated documentation files (the "Software"), |
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* to deal in the Software without restriction, including without limitation |
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* the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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* and/or sell copies of the Software, and to permit persons to whom the |
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* Software is furnished to do so, subject to the following conditions: |
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* |
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* The above copyright notice and this permission notice shall be included |
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* in all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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* OTHER DEALINGS IN THE SOFTWARE. |
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* |
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**************************************************************************/ |
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/*
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* basic library initialisation, teardown, reset |
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* and context creation tests. |
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*/ |
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#include <check.h> |
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#include <errno.h> |
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#include <poll.h> |
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#include <stdlib.h> |
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#include <unistd.h> |
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#include <virglrenderer.h> |
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#include "testvirgl.h" |
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START_TEST(virgl_fence_create) |
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{ |
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int ret; |
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ret = testvirgl_init_single_ctx(); |
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ck_assert_int_eq(ret, 0); |
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testvirgl_reset_fence(); |
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ret = virgl_renderer_create_fence(1, 0); |
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ck_assert_int_eq(ret, 0); |
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testvirgl_fini_single_ctx(); |
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} |
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END_TEST |
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START_TEST(virgl_fence_poll) |
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{ |
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const int target_seqno = 50; |
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int ret; |
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ret = testvirgl_init_single_ctx(); |
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ck_assert_int_eq(ret, 0); |
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testvirgl_reset_fence(); |
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ret = virgl_renderer_create_fence(target_seqno, 0); |
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ck_assert_int_eq(ret, 0); |
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do { |
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int seqno; |
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virgl_renderer_poll(); |
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seqno = testvirgl_get_last_fence(); |
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if (seqno == target_seqno) |
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break; |
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ck_assert_int_eq(seqno, 0); |
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usleep(1000); |
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} while(1); |
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testvirgl_fini_single_ctx(); |
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} |
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END_TEST |
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START_TEST(virgl_fence_poll_many) |
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{ |
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const int fence_count = 100; |
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const int base_seqno = 50; |
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const int target_seqno = base_seqno + fence_count - 1; |
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int last_seqno; |
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int ret; |
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int i; |
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ret = testvirgl_init_single_ctx(); |
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ck_assert_int_eq(ret, 0); |
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testvirgl_reset_fence(); |
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last_seqno = 0; |
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for (i = 0; i < fence_count; i++) { |
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ret = virgl_renderer_create_fence(base_seqno + i, 0); |
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ck_assert_int_eq(ret, 0); |
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} |
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do { |
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int seqno; |
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virgl_renderer_poll(); |
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seqno = testvirgl_get_last_fence(); |
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if (seqno == target_seqno) |
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break; |
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ck_assert(seqno == 0 || (seqno >= base_seqno && seqno < target_seqno)); |
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/* monotonic increasing */ |
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ck_assert_int_ge(seqno, last_seqno); |
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last_seqno = seqno; |
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usleep(1000); |
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} while(1); |
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testvirgl_fini_single_ctx(); |
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} |
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END_TEST |
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static int |
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wait_sync_fd(int fd, int timeout) |
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{ |
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struct pollfd pollfd = { |
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.fd = fd, |
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.events = POLLIN, |
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}; |
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int ret; |
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do { |
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ret = poll(&pollfd, 1, timeout); |
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} while (ret == -1 && (errno == EINTR || errno == EAGAIN)); |
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if (ret < 0) |
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return -errno; |
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else if (ret > 0 && !(pollfd.revents & POLLIN)) |
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return -EINVAL; |
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return ret ? 0 : -ETIME; |
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} |
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START_TEST(virgl_fence_export) |
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{ |
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const int target_seqno = 50; |
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int fd; |
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int ret; |
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ret = testvirgl_init_single_ctx(); |
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ck_assert_int_eq(ret, 0); |
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testvirgl_reset_fence(); |
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ret = virgl_renderer_create_fence(target_seqno, 0); |
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ck_assert_int_eq(ret, 0); |
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ret = virgl_renderer_export_fence(target_seqno, &fd); |
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ck_assert_int_eq(ret, 0); |
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ret = wait_sync_fd(fd, -1); |
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ck_assert_int_eq(ret, 0); |
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virgl_renderer_poll(); |
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ck_assert_int_eq(testvirgl_get_last_fence(), target_seqno); |
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close(fd); |
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testvirgl_fini_single_ctx(); |
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} |
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END_TEST |
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START_TEST(virgl_fence_export_signaled) |
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{ |
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const int target_seqno = 50; |
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const int test_range = 10; |
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int fd; |
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int ret; |
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int i; |
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ret = testvirgl_init_single_ctx(); |
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ck_assert_int_eq(ret, 0); |
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/* when there is no active fence, a signaled fd is always returned */ |
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for (i = 0; i < test_range; i++) { |
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ret = virgl_renderer_export_fence(target_seqno + 1 + i, &fd); |
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ck_assert_int_eq(ret, 0); |
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ret = wait_sync_fd(fd, 0); |
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ck_assert_int_eq(ret, 0); |
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close(fd); |
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} |
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ret = virgl_renderer_create_fence(target_seqno, 0); |
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ck_assert_int_eq(ret, 0); |
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/* when there is any active fence, a signaled fd is returned when the
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* requested seqno is smaller than the first active fence |
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*/ |
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for (i = 0; i < test_range; i++) { |
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ret = virgl_renderer_export_fence(target_seqno - 1 - i, &fd); |
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ck_assert_int_eq(ret, 0); |
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ret = wait_sync_fd(fd, 0); |
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ck_assert_int_eq(ret, 0); |
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close(fd); |
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} |
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testvirgl_fini_single_ctx(); |
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} |
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END_TEST |
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START_TEST(virgl_fence_export_invalid) |
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{ |
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const int target_seqno = 50; |
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const int target_seqno2 = 55; |
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int seqno; |
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int fd; |
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int ret; |
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ret = testvirgl_init_single_ctx(); |
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ck_assert_int_eq(ret, 0); |
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ret = virgl_renderer_create_fence(target_seqno, 0); |
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ck_assert_int_eq(ret, 0); |
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ret = virgl_renderer_create_fence(target_seqno2, 0); |
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ck_assert_int_eq(ret, 0); |
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for (seqno = target_seqno; seqno <= target_seqno2 + 1; seqno++) { |
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ret = virgl_renderer_export_fence(seqno, &fd); |
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if (seqno == target_seqno || seqno == target_seqno2) { |
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ck_assert_int_eq(ret, 0); |
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close(fd); |
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} else { |
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ck_assert_int_eq(ret, -EINVAL); |
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} |
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} |
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testvirgl_fini_single_ctx(); |
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} |
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END_TEST |
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static Suite *virgl_init_suite(bool include_fence_export) |
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{ |
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Suite *s; |
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TCase *tc_core; |
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s = suite_create("virgl_fence"); |
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tc_core = tcase_create("fence"); |
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tcase_add_test(tc_core, virgl_fence_create); |
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tcase_add_test(tc_core, virgl_fence_poll); |
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tcase_add_test(tc_core, virgl_fence_poll_many); |
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if (include_fence_export) { |
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tcase_add_test(tc_core, virgl_fence_export); |
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tcase_add_test(tc_core, virgl_fence_export_signaled); |
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tcase_add_test(tc_core, virgl_fence_export_invalid); |
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} |
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suite_add_tcase(s, tc_core); |
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return s; |
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} |
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static bool detect_fence_export_support(void) |
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{ |
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int dummy_cookie; |
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struct virgl_renderer_callbacks dummy_cbs; |
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int fd; |
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int ret; |
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memset(&dummy_cbs, 0, sizeof(dummy_cbs)); |
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dummy_cbs.version = 1; |
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ret = virgl_renderer_init(&dummy_cookie, context_flags, &dummy_cbs); |
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if (ret) |
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return false; |
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ret = virgl_renderer_export_fence(0, &fd); |
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if (ret) { |
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virgl_renderer_cleanup(&dummy_cookie); |
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return false; |
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} |
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close(fd); |
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virgl_renderer_cleanup(&dummy_cookie); |
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return true; |
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} |
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int main(void) |
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{ |
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Suite *s; |
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SRunner *sr; |
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int number_failed; |
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bool include_fence_export = false; |
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if (getenv("VRENDTEST_USE_EGL_SURFACELESS")) |
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context_flags |= VIRGL_RENDERER_USE_SURFACELESS; |
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if (getenv("VRENDTEST_USE_EGL_GLES")) { |
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context_flags |= VIRGL_RENDERER_USE_GLES; |
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include_fence_export = detect_fence_export_support(); |
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} |
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s = virgl_init_suite(include_fence_export); |
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sr = srunner_create(s); |
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srunner_run_all(sr, CK_NORMAL); |
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number_failed = srunner_ntests_failed(sr); |
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srunner_free(sr); |
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return number_failed == 0 ? EXIT_SUCCESS : EXIT_FAILURE; |
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} |
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